Technology for Mortals

AMD launched its 45nm Shanghai processors today for the server market ahead of Intel’s Nehalem processor launch.  AMD lists a series of benchmarks here but they omit many of the better results from Intel.  To get the full official results, here are the benchmarks based on the best scores available from AMD and Intel as of November 13th 2008.

It appears that AMD has made some important gains and it has taken the lead in SPECjbb, SPECweb, expanded its lead in SPECfp, and Virtualization (due to Nested Paging).  AMD still trails in SPECint, SPECpower, and SAP but this is an important victory for AMD which has been plagued with delays in 2007 and 2008 with its previous Barcelona processor.  Shanghai is a major milestone for AMD because it required a shift to a whole new 45nm immersion lithography process and it shows that AMD can launch a product on time and put Barcelona behind them.

However, Intel is expected to launch its Nehalem-EP processors for the mainstream two-socket server market within a few months and Nehalem is expected to be a huge jump in performance on the server platform.  While the new triple-channel DDR3 unbuffered memory subsystem doesn’t do too much for the Intel i7 Nehalem desktop processors, it is expected to unleash a huge increase in performance for Intel Nehalem.

Intel’s Penryn class of processors launched last year will be the last generation of Intel processors to use the Front Side Bus (FSB) and a single North Bridge memory controller located on the motherboard.  The FSB and single North Bridge memory controller wasn’t a problem for most of Intel’s product line but it significantly hampered Penryn’s performance in the two-socket market at higher clock speeds.  But this wasn’t a problem since AMD had trouble launching its Barcelona products early enough and at high enough clock speeds to threaten Penryn on the high end, and only now are the newest AMD Shanghai processors competing head to head with Intel Penryn.  Some people wondered why Intel stuck with the FSB architecture for so long, but the timing seems to have been appropriate given the outcome in the last two years.

Intel’s Nehalem will be too fast to run on FSB architecture which is why Intel designed it with QuickPath.  Nehalem will have no such memory bandwidth limitations as it transitions to QuickPath architecture with a memory controller on each microprocessor.  Nehalem also catches up with AMD on nested paging support for improved virtualization, but the late timing doesn’t seem to have hurt Intel given the fact that virtualization hypervisors are only now beginning to support nested paging.  So the race is on to see how quickly AMD can ramp up Shanghai processors and how long it takes Intel to launch Nehalem.